Approximate Computing on Programmable SoCs via Neural Acceleration

Processor designs for portable, ubiquitous computing devices such as cell phones have widely incorporated hardware accelerators to support energy-efficient execution of common tasks. Porting applications to take advantage of these resources is often a difficult task due to the restricted programming model of the accelerator: FPGA-based acceleration, for instance, often requires the expertise of a hardware designer. Fortunately, many applications that can take advantage of accelerators are amenable to approximate execution, which prior work has shown can be exploited with a simple programming model. This paper presents a comprehensive and mostly automatic framework that allows general-purpose approximate code to use programmable logic without directly involving hardware design. We propose SNNAP, a flexible FPGA-based neural accelerator for approximate programs. We identify the challenges associated with this approach and design a hardware framework that offers this capability. We measure a real FPGA implementation on a state-of-the-art programmable systemon-a-chip (PSoC) and show an average 1.77× speedup and 1.71× energy savings.